Taking superconducting qubits from fabrication to generating their first informative datasets is a lengthy process. This process involves days of cooldown before hours of resonance tracking, manual power sweeps, and precise spectroscopy, and this process repeats for each new chip.
This manual characterization process, also known as bring-up, becomes an increasingly challenging bottleneck as the quantum computing sector develops and mass production accelerates.
Zurich Instruments’ automation framework founded on LabOne Q directly solves this bottleneck, taking recently produced qubits from design specifications to fully evaluated devices with limited human intervention. This system was investigated on seven four-qubit chips in a joint study from Zurich Instruments and Fraunhofer EMFT.
The workflow effectively evaluated all 28 qubits in around three hours of total runtime. Manual techniques would normally take days of operator time for an equivalent set of devices; this was a dramatic decrease.
Two qubits demonstrated very weak coupling and were accurately reported by the system, while the rest of the 26 qubits were located and profiled.
Scalable qubit fabrication meets automated characterization. a) Fraunhofer EMFT focuses on scalable fabrication of superconducting qubit chips using industrial CMOS-compatible processes on 200-mm wafers. By transitioning qubit production from research to a foundry environment, the institute aims to enable quantum computers with hundreds to thousands of qubits. Image Credit: © Fraunhofer EMFT / Bernd Müller. b) Impression from the lab: a researcher uses the LabOne Q automation framework to characterize newly fabricated qubit chips. Image Credit: © Fraunhofer EMFT / Nick Frank.
Fraunhofer EMFT specializes in the scalable manufacture of superconducting qubit chips based on industry-standard complementary metal-oxide-semiconductor (CMOS)-compatible processes on 200 mm wafers.
By migrating qubit fabrication from the research laboratory to a foundry setting, the organization hopes to achieve quantum computers featuring hundreds to thousands of qubits. A glimpse inside the laboratory is seen above, where a researcher employs the LabOne Q automation framework to profile recently produced qubit chips.
The Case for Automation
Automation significantly decreases the interval between cooldown and initial data by removing routine discovery procedures. Automation embeds decision logic and best practices directly into the workflow, increasing the system’s resilience against device variability while eliminating the need for continual specialist input.
Automation also delivers parallel execution across chips and qubits when crosstalk levels allow, offering a route to scale as device complexity increases.
The issue is not whether to automate, but implementing automation in a way that manages practical device variability while retaining enough flexibility to tailor to a range of user requirements and chip architectures.
Workflow Architecture: The DAG Approach
The bring-up procedure is arranged as a directed acyclic graph (DAG), which delivers natural orchestration for complicated testing sequences. Every node in the graph signifies an entire calibration workflow that adheres to a repeatable pattern: at the outset, the system produces, compiles, and performs an experiment utilizing the most accurate metrics known at that stage.
These metrics may be previously recorded values: for example, design parameters plotted from the device design when no measurement data existed or a readout resonator frequency measured in an earlier stage.
After the experiment concludes, the workflow processes the collected data and assesses whether the calibration was effective using predefined criteria. Success can amount to characterizing a spectroscopic feature with adequate confidence or sensing a resonance higher than a particular signal-to-noise threshold.
The workflow refreshes the known parameter set with the newly recorded value when a calibration is effective. If a calibration is ineffective, the workflow can report the issue, make recovery attempts, or pause and highlight that specific coupling element or qubit for manual intervention.
The cycle of measuring with current knowledge, analyzing, validating, and updating repeats at each node, with the defined parameter becoming increasingly complex as the workflow progresses through the graph.
The architecture clearly defines decision-making, analysis, and data collection while upholding the flexibility to add, remove, or change steps without the need to redefine the total workflow.
Execution techniques can be improved even further using the DAG framework. Results from every node are cached, enabling fast reruns when just a subset of parameters shift.
The system understands which downstream stages need to be repeated and which can use cached results as the dependencies are automatically tracked. This becomes especially beneficial in development and debugging, where a single step may require iteration.
Figure 1. Directed acyclic graph (DAG) architecture for automated bring-up. a) The bring-up process is organized as a DAG where each node represents a complete calibration workflow. b) Each workflow follows a consistent cycle: create, compile and execute an experiment using the best available parameters (either previously measured values or design parameters), analyze the acquired data, evaluate success based on predefined criteria (e.g., signal-to-noise thresholds), and update the parameter set with newly measured values. Image Credit: Zurich Instruments AG
Acknowledgments
Produced from materials originally authored by Lukas Sigl from Zurich Instruments.
This information has been sourced, reviewed, and adapted from materials provided by Zurich Instruments AG.
For more information on this source, please visit Zurich Instruments AG.